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flm01
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0d3f076b5f
flm01
/
mote
/
v2
History
Bart Van Der Meerssche
0d3f076b5f
[spidev + nixio + fluksod] allow the bitbanged spi max speed and inter-byte delay to be dynamically set from user space
2011-01-19 22:12:49 +01:00
..
avr
[avr + fluksod] enable crc checking in both spi directions
2011-01-17 11:11:44 +01:00
eagle
eagle: clean up PCB layout for sensor board, shorten current paths for decoupling capacitors
2010-12-04 10:14:54 +01:00
openwrt
[spidev + nixio + fluksod] allow the bitbanged spi max speed and inter-byte delay to be dynamically set from user space
2011-01-19 22:12:49 +01:00