986 lines
25 KiB
C++
Executable File
986 lines
25 KiB
C++
Executable File
/*
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Copyright (C) 2011 J. Coliz <maniacbug@ymail.com>
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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version 2 as published by the Free Software Foundation.
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*/
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#include "nRF24L01.h"
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#include "RF24_config.h"
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#include "RF24.h"
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/****************************************************************************/
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void RF24::csn(int mode)
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{
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// Minimum ideal SPI bus speed is 2x data rate
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// If we assume 2Mbs data rate and 16Mhz clock, a
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// divider of 4 is the minimum we want.
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// CLK:BUS 8Mhz:2Mhz, 16Mhz:4Mhz, or 20Mhz:5Mhz
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#ifdef ARDUINO
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SPI.setBitOrder(MSBFIRST);
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SPI.setDataMode(SPI_MODE0);
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SPI.setClockDivider(SPI_CLOCK_DIV4);
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#endif
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digitalWrite(csn_pin,mode);
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}
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/****************************************************************************/
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void RF24::ce(int level)
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{
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digitalWrite(ce_pin,level);
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}
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/****************************************************************************/
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uint8_t RF24::read_register(uint8_t reg, uint8_t* buf, uint8_t len)
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{
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uint8_t status;
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csn(LOW);
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status = SPI.transfer( R_REGISTER | ( REGISTER_MASK & reg ) );
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while ( len-- )
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*buf++ = SPI.transfer(0xff);
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csn(HIGH);
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return status;
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}
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/****************************************************************************/
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uint8_t RF24::read_register(uint8_t reg)
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{
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csn(LOW);
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SPI.transfer( R_REGISTER | ( REGISTER_MASK & reg ) );
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uint8_t result = SPI.transfer(0xff);
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csn(HIGH);
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return result;
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}
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/****************************************************************************/
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uint8_t RF24::write_register(uint8_t reg, const uint8_t* buf, uint8_t len)
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{
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uint8_t status;
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csn(LOW);
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status = SPI.transfer( W_REGISTER | ( REGISTER_MASK & reg ) );
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while ( len-- )
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SPI.transfer(*buf++);
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csn(HIGH);
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return status;
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}
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/****************************************************************************/
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uint8_t RF24::write_register(uint8_t reg, uint8_t value)
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{
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uint8_t status;
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IF_SERIAL_DEBUG(printf_P(PSTR("write_register(%02x,%02x)\r\n"),reg,value));
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csn(LOW);
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status = SPI.transfer( W_REGISTER | ( REGISTER_MASK & reg ) );
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SPI.transfer(value);
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csn(HIGH);
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return status;
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}
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/****************************************************************************/
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uint8_t RF24::write_payload(const void* buf, uint8_t len)
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{
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uint8_t status;
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const uint8_t* current = reinterpret_cast<const uint8_t*>(buf);
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uint8_t data_len = min(len,payload_size);
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uint8_t blank_len = dynamic_payloads_enabled ? 0 : payload_size - data_len;
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//printf("[Writing %u bytes %u blanks]",data_len,blank_len);
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csn(LOW);
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status = SPI.transfer( W_TX_PAYLOAD );
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while ( data_len-- )
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SPI.transfer(*current++);
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while ( blank_len-- )
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SPI.transfer(0);
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csn(HIGH);
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return status;
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}
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/****************************************************************************/
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uint8_t RF24::read_payload(void* buf, uint8_t len)
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{
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uint8_t status;
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uint8_t* current = reinterpret_cast<uint8_t*>(buf);
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uint8_t data_len = min(len,payload_size);
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uint8_t blank_len = dynamic_payloads_enabled ? 0 : payload_size - data_len;
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//printf("[Reading %u bytes %u blanks]",data_len,blank_len);
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csn(LOW);
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status = SPI.transfer( R_RX_PAYLOAD );
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while ( data_len-- )
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*current++ = SPI.transfer(0xff);
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while ( blank_len-- )
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SPI.transfer(0xff);
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csn(HIGH);
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return status;
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}
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/****************************************************************************/
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uint8_t RF24::flush_rx(void)
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{
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uint8_t status;
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csn(LOW);
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status = SPI.transfer( FLUSH_RX );
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csn(HIGH);
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return status;
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}
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/****************************************************************************/
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uint8_t RF24::flush_tx(void)
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{
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uint8_t status;
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csn(LOW);
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status = SPI.transfer( FLUSH_TX );
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csn(HIGH);
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return status;
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}
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/****************************************************************************/
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uint8_t RF24::get_status(void)
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{
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uint8_t status;
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csn(LOW);
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status = SPI.transfer( NOP );
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csn(HIGH);
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return status;
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}
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/****************************************************************************/
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void RF24::print_status(uint8_t status)
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{
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printf_P(PSTR("STATUS\t\t = 0x%02x RX_DR=%x TX_DS=%x MAX_RT=%x RX_P_NO=%x TX_FULL=%x\r\n"),
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status,
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(status & _BV(RX_DR))?1:0,
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(status & _BV(TX_DS))?1:0,
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(status & _BV(MAX_RT))?1:0,
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((status >> RX_P_NO) & B111),
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(status & _BV(TX_FULL))?1:0
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);
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}
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/****************************************************************************/
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void RF24::print_observe_tx(uint8_t value)
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{
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printf_P(PSTR("OBSERVE_TX=%02x: POLS_CNT=%x ARC_CNT=%x\r\n"),
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value,
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(value >> PLOS_CNT) & B1111,
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(value >> ARC_CNT) & B1111
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);
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}
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/****************************************************************************/
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void RF24::print_byte_register(const char* name, uint8_t reg, uint8_t qty)
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{
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char extra_tab = strlen_P(name) < 8 ? '\t' : 0;
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printf_P(PSTR(PRIPSTR"\t%c ="),name,extra_tab);
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while (qty--)
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printf_P(PSTR(" 0x%02x"),read_register(reg++));
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printf_P(PSTR("\r\n"));
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}
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/****************************************************************************/
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void RF24::print_address_register(const char* name, uint8_t reg, uint8_t qty)
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{
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char extra_tab = strlen_P(name) < 8 ? '\t' : 0;
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printf_P(PSTR(PRIPSTR"\t%c ="),name,extra_tab);
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while (qty--)
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{
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uint8_t buffer[5];
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read_register(reg++,buffer,sizeof buffer);
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printf_P(PSTR(" 0x"));
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uint8_t* bufptr = buffer + sizeof buffer;
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while( --bufptr >= buffer )
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printf_P(PSTR("%02x"),*bufptr);
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}
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printf_P(PSTR("\r\n"));
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}
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/****************************************************************************/
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RF24::RF24(uint8_t _cepin, uint8_t _cspin):
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ce_pin(_cepin), csn_pin(_cspin), wide_band(true), p_variant(false),
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payload_size(32), ack_payload_available(false), dynamic_payloads_enabled(false),
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pipe0_reading_address(0)
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{
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}
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/****************************************************************************/
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void RF24::setChannel(uint8_t channel)
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{
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// TODO: This method could take advantage of the 'wide_band' calculation
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// done in setChannel() to require certain channel spacing.
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const uint8_t max_channel = 127;
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write_register(RF_CH,min(channel,max_channel));
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}
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/****************************************************************************/
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void RF24::setPayloadSize(uint8_t size)
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{
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const uint8_t max_payload_size = 32;
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payload_size = min(size,max_payload_size);
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}
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/****************************************************************************/
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uint8_t RF24::getPayloadSize(void)
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{
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return payload_size;
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}
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/****************************************************************************/
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static const char rf24_datarate_e_str_0[] PROGMEM = "1MBPS";
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static const char rf24_datarate_e_str_1[] PROGMEM = "2MBPS";
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static const char rf24_datarate_e_str_2[] PROGMEM = "250KBPS";
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static const char * const rf24_datarate_e_str_P[] PROGMEM = {
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rf24_datarate_e_str_0,
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rf24_datarate_e_str_1,
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rf24_datarate_e_str_2,
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};
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static const char rf24_model_e_str_0[] PROGMEM = "nRF24L01";
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static const char rf24_model_e_str_1[] PROGMEM = "nRF24L01+";
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static const char * const rf24_model_e_str_P[] PROGMEM = {
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rf24_model_e_str_0,
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rf24_model_e_str_1,
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};
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static const char rf24_crclength_e_str_0[] PROGMEM = "Disabled";
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static const char rf24_crclength_e_str_1[] PROGMEM = "8 bits";
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static const char rf24_crclength_e_str_2[] PROGMEM = "16 bits" ;
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static const char * const rf24_crclength_e_str_P[] PROGMEM = {
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rf24_crclength_e_str_0,
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rf24_crclength_e_str_1,
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rf24_crclength_e_str_2,
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};
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static const char rf24_pa_dbm_e_str_0[] PROGMEM = "PA_MIN";
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static const char rf24_pa_dbm_e_str_1[] PROGMEM = "PA_LOW";
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static const char rf24_pa_dbm_e_str_2[] PROGMEM = "LA_MED";
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static const char rf24_pa_dbm_e_str_3[] PROGMEM = "PA_HIGH";
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static const char * const rf24_pa_dbm_e_str_P[] PROGMEM = {
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rf24_pa_dbm_e_str_0,
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rf24_pa_dbm_e_str_1,
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rf24_pa_dbm_e_str_2,
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rf24_pa_dbm_e_str_3,
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};
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void RF24::printDetails(void)
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{
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print_status(get_status());
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print_address_register(PSTR("RX_ADDR_P0-1"),RX_ADDR_P0,2);
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print_byte_register(PSTR("RX_ADDR_P2-5"),RX_ADDR_P2,4);
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print_address_register(PSTR("TX_ADDR"),TX_ADDR);
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print_byte_register(PSTR("RX_PW_P0-6"),RX_PW_P0,6);
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print_byte_register(PSTR("EN_AA"),EN_AA);
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print_byte_register(PSTR("EN_RXADDR"),EN_RXADDR);
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print_byte_register(PSTR("RF_CH"),RF_CH);
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print_byte_register(PSTR("RF_SETUP"),RF_SETUP);
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print_byte_register(PSTR("CONFIG"),CONFIG);
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print_byte_register(PSTR("DYNPD/FEATURE"),DYNPD,2);
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printf_P(PSTR("Data Rate\t = %S\r\n"),pgm_read_word(&rf24_datarate_e_str_P[getDataRate()]));
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printf_P(PSTR("Model\t\t = %S\r\n"),pgm_read_word(&rf24_model_e_str_P[isPVariant()]));
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printf_P(PSTR("CRC Length\t = %S\r\n"),pgm_read_word(&rf24_crclength_e_str_P[getCRCLength()]));
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printf_P(PSTR("PA Power\t = %S\r\n"),pgm_read_word(&rf24_pa_dbm_e_str_P[getPALevel()]));
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}
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/****************************************************************************/
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void RF24::begin(void)
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{
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// Initialize pins
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pinMode(ce_pin,OUTPUT);
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pinMode(csn_pin,OUTPUT);
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// Initialize SPI bus
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SPI.begin();
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ce(LOW);
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csn(HIGH);
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// Must allow the radio time to settle else configuration bits will not necessarily stick.
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// This is actually only required following power up but some settling time also appears to
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// be required after resets too. For full coverage, we'll always assume the worst.
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// Enabling 16b CRC is by far the most obvious case if the wrong timing is used - or skipped.
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// Technically we require 4.5ms + 14us as a worst case. We'll just call it 5ms for good measure.
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// WARNING: Delay is based on P-variant whereby non-P *may* require different timing.
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delay( 5 ) ;
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// Set 1500uS (minimum for 32B payload in ESB@250KBPS) timeouts, to make testing a little easier
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// WARNING: If this is ever lowered, either 250KBS mode with AA is broken or maximum packet
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// sizes must never be used. See documentation for a more complete explanation.
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write_register(SETUP_RETR,(B0100 << ARD) | (B1111 << ARC));
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// Restore our default PA level
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setPALevel( RF24_PA_MAX ) ;
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// Determine if this is a p or non-p RF24 module and then
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// reset our data rate back to default value. This works
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// because a non-P variant won't allow the data rate to
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// be set to 250Kbps.
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if( setDataRate( RF24_250KBPS ) )
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{
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p_variant = true ;
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}
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// Then set the data rate to the slowest (and most reliable) speed supported by all
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// hardware.
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setDataRate( RF24_1MBPS ) ;
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// Initialize CRC and request 2-byte (16bit) CRC
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setCRCLength( RF24_CRC_16 ) ;
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// Disable dynamic payloads, to match dynamic_payloads_enabled setting
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write_register(DYNPD,0);
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// Reset current status
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// Notice reset and flush is the last thing we do
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write_register(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
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// Set up default configuration. Callers can always change it later.
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// This channel should be universally safe and not bleed over into adjacent
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// spectrum.
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setChannel(76);
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// Flush buffers
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flush_rx();
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flush_tx();
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}
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/****************************************************************************/
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void RF24::startListening(void)
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{
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write_register(CONFIG, read_register(CONFIG) | _BV(PWR_UP) | _BV(PRIM_RX));
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write_register(STATUS, _BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
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// Restore the pipe0 adddress, if exists
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if (pipe0_reading_address)
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write_register(RX_ADDR_P0, reinterpret_cast<const uint8_t*>(&pipe0_reading_address), 5);
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// Flush buffers
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flush_rx();
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flush_tx();
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// Go!
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ce(HIGH);
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// wait for the radio to come up (130us actually only needed)
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delayMicroseconds(130);
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}
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/****************************************************************************/
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void RF24::stopListening(void)
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{
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ce(LOW);
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flush_tx();
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flush_rx();
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}
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/****************************************************************************/
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void RF24::powerDown(void)
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{
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write_register(CONFIG,read_register(CONFIG) & ~_BV(PWR_UP));
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}
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/****************************************************************************/
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void RF24::powerUp(void)
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{
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write_register(CONFIG,read_register(CONFIG) | _BV(PWR_UP));
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}
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/******************************************************************/
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bool RF24::write( const void* buf, uint8_t len )
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{
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bool result = false;
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// Begin the write
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startWrite(buf,len);
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// ------------
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// At this point we could return from a non-blocking write, and then call
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// the rest after an interrupt
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// Instead, we are going to block here until we get TX_DS (transmission completed and ack'd)
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// or MAX_RT (maximum retries, transmission failed). Also, we'll timeout in case the radio
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// is flaky and we get neither.
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// IN the end, the send should be blocking. It comes back in 60ms worst case, or much faster
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// if I tighted up the retry logic. (Default settings will be 1500us.
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// Monitor the send
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uint8_t observe_tx;
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uint8_t status;
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uint32_t sent_at = millis();
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const uint32_t timeout = 500; //ms to wait for timeout
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do
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{
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status = read_register(OBSERVE_TX,&observe_tx,1);
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IF_SERIAL_DEBUG(Serial.print(observe_tx,HEX));
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}
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while( ! ( status & ( _BV(TX_DS) | _BV(MAX_RT) ) ) && ( millis() - sent_at < timeout ) );
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// The part above is what you could recreate with your own interrupt handler,
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// and then call this when you got an interrupt
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// ------------
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// Call this when you get an interrupt
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// The status tells us three things
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// * The send was successful (TX_DS)
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// * The send failed, too many retries (MAX_RT)
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// * There is an ack packet waiting (RX_DR)
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bool tx_ok, tx_fail;
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whatHappened(tx_ok,tx_fail,ack_payload_available);
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//printf("%u%u%u\r\n",tx_ok,tx_fail,ack_payload_available);
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result = tx_ok;
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IF_SERIAL_DEBUG(Serial.print(result?"...OK.":"...Failed"));
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// Handle the ack packet
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if ( ack_payload_available )
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{
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ack_payload_length = getDynamicPayloadSize();
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IF_SERIAL_DEBUG(Serial.print("[AckPacket]/"));
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IF_SERIAL_DEBUG(Serial.println(ack_payload_length,DEC));
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}
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// Yay, we are done.
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// Power down
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powerDown();
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// Flush buffers (Is this a relic of past experimentation, and not needed anymore??)
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flush_tx();
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return result;
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}
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/****************************************************************************/
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void RF24::startWrite( const void* buf, uint8_t len )
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{
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// Transmitter power-up
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write_register(CONFIG, ( read_register(CONFIG) | _BV(PWR_UP) ) & ~_BV(PRIM_RX) );
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delayMicroseconds(150);
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// Send the payload
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write_payload( buf, len );
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// Allons!
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ce(HIGH);
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delayMicroseconds(15);
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ce(LOW);
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
uint8_t RF24::getDynamicPayloadSize(void)
|
|
{
|
|
uint8_t result = 0;
|
|
|
|
csn(LOW);
|
|
SPI.transfer( R_RX_PL_WID );
|
|
result = SPI.transfer(0xff);
|
|
csn(HIGH);
|
|
|
|
return result;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
bool RF24::available(void)
|
|
{
|
|
return available(NULL);
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
bool RF24::available(uint8_t* pipe_num)
|
|
{
|
|
uint8_t status = get_status();
|
|
|
|
// Too noisy, enable if you really want lots o data!!
|
|
//IF_SERIAL_DEBUG(print_status(status));
|
|
|
|
bool result = ( status & _BV(RX_DR) );
|
|
|
|
if (result)
|
|
{
|
|
// If the caller wants the pipe number, include that
|
|
if ( pipe_num )
|
|
*pipe_num = ( status >> RX_P_NO ) & B111;
|
|
|
|
// Clear the status bit
|
|
|
|
// ??? Should this REALLY be cleared now? Or wait until we
|
|
// actually READ the payload?
|
|
|
|
write_register(STATUS,_BV(RX_DR) );
|
|
|
|
// Handle ack payload receipt
|
|
if ( status & _BV(TX_DS) )
|
|
{
|
|
write_register(STATUS,_BV(TX_DS));
|
|
}
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
bool RF24::read( void* buf, uint8_t len )
|
|
{
|
|
// Fetch the payload
|
|
read_payload( buf, len );
|
|
|
|
// was this the last of the data available?
|
|
return read_register(FIFO_STATUS) & _BV(RX_EMPTY);
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
void RF24::whatHappened(bool& tx_ok,bool& tx_fail,bool& rx_ready)
|
|
{
|
|
// Read the status & reset the status in one easy call
|
|
// Or is that such a good idea?
|
|
uint8_t status = write_register(STATUS,_BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
|
|
|
|
// Report to the user what happened
|
|
tx_ok = status & _BV(TX_DS);
|
|
tx_fail = status & _BV(MAX_RT);
|
|
rx_ready = status & _BV(RX_DR);
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
void RF24::openWritingPipe(uint64_t value)
|
|
{
|
|
// Note that AVR 8-bit uC's store this LSB first, and the NRF24L01(+)
|
|
// expects it LSB first too, so we're good.
|
|
|
|
write_register(RX_ADDR_P0, reinterpret_cast<uint8_t*>(&value), 5);
|
|
write_register(TX_ADDR, reinterpret_cast<uint8_t*>(&value), 5);
|
|
|
|
const uint8_t max_payload_size = 32;
|
|
write_register(RX_PW_P0,min(payload_size,max_payload_size));
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
static const uint8_t child_pipe[] PROGMEM =
|
|
{
|
|
RX_ADDR_P0, RX_ADDR_P1, RX_ADDR_P2, RX_ADDR_P3, RX_ADDR_P4, RX_ADDR_P5
|
|
};
|
|
static const uint8_t child_payload_size[] PROGMEM =
|
|
{
|
|
RX_PW_P0, RX_PW_P1, RX_PW_P2, RX_PW_P3, RX_PW_P4, RX_PW_P5
|
|
};
|
|
static const uint8_t child_pipe_enable[] PROGMEM =
|
|
{
|
|
ERX_P0, ERX_P1, ERX_P2, ERX_P3, ERX_P4, ERX_P5
|
|
};
|
|
|
|
void RF24::openReadingPipe(uint8_t child, uint64_t address)
|
|
{
|
|
// If this is pipe 0, cache the address. This is needed because
|
|
// openWritingPipe() will overwrite the pipe 0 address, so
|
|
// startListening() will have to restore it.
|
|
if (child == 0)
|
|
pipe0_reading_address = address;
|
|
|
|
if (child <= 6)
|
|
{
|
|
// For pipes 2-5, only write the LSB
|
|
if ( child < 2 )
|
|
write_register(pgm_read_byte(&child_pipe[child]), reinterpret_cast<const uint8_t*>(&address), 5);
|
|
else
|
|
write_register(pgm_read_byte(&child_pipe[child]), reinterpret_cast<const uint8_t*>(&address), 1);
|
|
|
|
write_register(pgm_read_byte(&child_payload_size[child]),payload_size);
|
|
|
|
// Note it would be more efficient to set all of the bits for all open
|
|
// pipes at once. However, I thought it would make the calling code
|
|
// more simple to do it this way.
|
|
write_register(EN_RXADDR,read_register(EN_RXADDR) | _BV(pgm_read_byte(&child_pipe_enable[child])));
|
|
}
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
void RF24::toggle_features(void)
|
|
{
|
|
csn(LOW);
|
|
SPI.transfer( ACTIVATE );
|
|
SPI.transfer( 0x73 );
|
|
csn(HIGH);
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
void RF24::enableDynamicPayloads(void)
|
|
{
|
|
// Enable dynamic payload throughout the system
|
|
write_register(FEATURE,read_register(FEATURE) | _BV(EN_DPL) );
|
|
|
|
// If it didn't work, the features are not enabled
|
|
if ( ! read_register(FEATURE) )
|
|
{
|
|
// So enable them and try again
|
|
toggle_features();
|
|
write_register(FEATURE,read_register(FEATURE) | _BV(EN_DPL) );
|
|
}
|
|
|
|
IF_SERIAL_DEBUG(printf("FEATURE=%i\r\n",read_register(FEATURE)));
|
|
|
|
// Enable dynamic payload on all pipes
|
|
//
|
|
// Not sure the use case of only having dynamic payload on certain
|
|
// pipes, so the library does not support it.
|
|
write_register(DYNPD,read_register(DYNPD) | _BV(DPL_P5) | _BV(DPL_P4) | _BV(DPL_P3) | _BV(DPL_P2) | _BV(DPL_P1) | _BV(DPL_P0));
|
|
|
|
dynamic_payloads_enabled = true;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
void RF24::enableAckPayload(void)
|
|
{
|
|
//
|
|
// enable ack payload and dynamic payload features
|
|
//
|
|
|
|
write_register(FEATURE,read_register(FEATURE) | _BV(EN_ACK_PAY) | _BV(EN_DPL) );
|
|
|
|
// If it didn't work, the features are not enabled
|
|
if ( ! read_register(FEATURE) )
|
|
{
|
|
// So enable them and try again
|
|
toggle_features();
|
|
write_register(FEATURE,read_register(FEATURE) | _BV(EN_ACK_PAY) | _BV(EN_DPL) );
|
|
}
|
|
|
|
IF_SERIAL_DEBUG(printf("FEATURE=%i\r\n",read_register(FEATURE)));
|
|
|
|
//
|
|
// Enable dynamic payload on pipes 0 & 1
|
|
//
|
|
|
|
write_register(DYNPD,read_register(DYNPD) | _BV(DPL_P1) | _BV(DPL_P0));
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
void RF24::writeAckPayload(uint8_t pipe, const void* buf, uint8_t len)
|
|
{
|
|
const uint8_t* current = reinterpret_cast<const uint8_t*>(buf);
|
|
|
|
csn(LOW);
|
|
SPI.transfer( W_ACK_PAYLOAD | ( pipe & B111 ) );
|
|
const uint8_t max_payload_size = 32;
|
|
uint8_t data_len = min(len,max_payload_size);
|
|
while ( data_len-- )
|
|
SPI.transfer(*current++);
|
|
|
|
csn(HIGH);
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
bool RF24::isAckPayloadAvailable(void)
|
|
{
|
|
bool result = ack_payload_available;
|
|
ack_payload_available = false;
|
|
return result;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
bool RF24::isPVariant(void)
|
|
{
|
|
return p_variant ;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
void RF24::setAutoAck(bool enable)
|
|
{
|
|
if ( enable )
|
|
write_register(EN_AA, B111111);
|
|
else
|
|
write_register(EN_AA, 0);
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
void RF24::setAutoAck( uint8_t pipe, bool enable )
|
|
{
|
|
if ( pipe <= 6 )
|
|
{
|
|
uint8_t en_aa = read_register( EN_AA ) ;
|
|
if( enable )
|
|
{
|
|
en_aa |= _BV(pipe) ;
|
|
}
|
|
else
|
|
{
|
|
en_aa &= ~_BV(pipe) ;
|
|
}
|
|
write_register( EN_AA, en_aa ) ;
|
|
}
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
bool RF24::testCarrier(void)
|
|
{
|
|
return ( read_register(CD) & 1 );
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
bool RF24::testRPD(void)
|
|
{
|
|
return ( read_register(RPD) & 1 ) ;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
void RF24::setPALevel(rf24_pa_dbm_e level)
|
|
{
|
|
uint8_t setup = read_register(RF_SETUP) ;
|
|
setup &= ~(_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ;
|
|
|
|
// switch uses RAM (evil!)
|
|
if ( level == RF24_PA_MAX )
|
|
{
|
|
setup |= (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ;
|
|
}
|
|
else if ( level == RF24_PA_HIGH )
|
|
{
|
|
setup |= _BV(RF_PWR_HIGH) ;
|
|
}
|
|
else if ( level == RF24_PA_LOW )
|
|
{
|
|
setup |= _BV(RF_PWR_LOW);
|
|
}
|
|
else if ( level == RF24_PA_MIN )
|
|
{
|
|
// nothing
|
|
}
|
|
else if ( level == RF24_PA_ERROR )
|
|
{
|
|
// On error, go to maximum PA
|
|
setup |= (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ;
|
|
}
|
|
|
|
write_register( RF_SETUP, setup ) ;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
rf24_pa_dbm_e RF24::getPALevel(void)
|
|
{
|
|
rf24_pa_dbm_e result = RF24_PA_ERROR ;
|
|
uint8_t power = read_register(RF_SETUP) & (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) ;
|
|
|
|
// switch uses RAM (evil!)
|
|
if ( power == (_BV(RF_PWR_LOW) | _BV(RF_PWR_HIGH)) )
|
|
{
|
|
result = RF24_PA_MAX ;
|
|
}
|
|
else if ( power == _BV(RF_PWR_HIGH) )
|
|
{
|
|
result = RF24_PA_HIGH ;
|
|
}
|
|
else if ( power == _BV(RF_PWR_LOW) )
|
|
{
|
|
result = RF24_PA_LOW ;
|
|
}
|
|
else
|
|
{
|
|
result = RF24_PA_MIN ;
|
|
}
|
|
|
|
return result ;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
bool RF24::setDataRate(rf24_datarate_e speed)
|
|
{
|
|
bool result = false;
|
|
uint8_t setup = read_register(RF_SETUP) ;
|
|
|
|
// HIGH and LOW '00' is 1Mbs - our default
|
|
wide_band = false ;
|
|
setup &= ~(_BV(RF_DR_LOW) | _BV(RF_DR_HIGH)) ;
|
|
if( speed == RF24_250KBPS )
|
|
{
|
|
// Must set the RF_DR_LOW to 1; RF_DR_HIGH (used to be RF_DR) is already 0
|
|
// Making it '10'.
|
|
wide_band = false ;
|
|
setup |= _BV( RF_DR_LOW ) ;
|
|
}
|
|
else
|
|
{
|
|
// Set 2Mbs, RF_DR (RF_DR_HIGH) is set 1
|
|
// Making it '01'
|
|
if ( speed == RF24_2MBPS )
|
|
{
|
|
wide_band = true ;
|
|
setup |= _BV(RF_DR_HIGH);
|
|
}
|
|
else
|
|
{
|
|
// 1Mbs
|
|
wide_band = false ;
|
|
}
|
|
}
|
|
write_register(RF_SETUP,setup);
|
|
|
|
// Verify our result
|
|
if ( read_register(RF_SETUP) == setup )
|
|
{
|
|
result = true;
|
|
}
|
|
else
|
|
{
|
|
wide_band = false;
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
rf24_datarate_e RF24::getDataRate( void )
|
|
{
|
|
rf24_datarate_e result ;
|
|
uint8_t dr = read_register(RF_SETUP) & (_BV(RF_DR_LOW) | _BV(RF_DR_HIGH));
|
|
|
|
// switch uses RAM (evil!)
|
|
// Order matters in our case below
|
|
if ( dr == _BV(RF_DR_LOW) )
|
|
{
|
|
// '10' = 250KBPS
|
|
result = RF24_250KBPS ;
|
|
}
|
|
else if ( dr == _BV(RF_DR_HIGH) )
|
|
{
|
|
// '01' = 2MBPS
|
|
result = RF24_2MBPS ;
|
|
}
|
|
else
|
|
{
|
|
// '00' = 1MBPS
|
|
result = RF24_1MBPS ;
|
|
}
|
|
return result ;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
void RF24::setCRCLength(rf24_crclength_e length)
|
|
{
|
|
uint8_t config = read_register(CONFIG) & ~( _BV(CRCO) | _BV(EN_CRC)) ;
|
|
|
|
// switch uses RAM (evil!)
|
|
if ( length == RF24_CRC_DISABLED )
|
|
{
|
|
// Do nothing, we turned it off above.
|
|
}
|
|
else if ( length == RF24_CRC_8 )
|
|
{
|
|
config |= _BV(EN_CRC);
|
|
}
|
|
else
|
|
{
|
|
config |= _BV(EN_CRC);
|
|
config |= _BV( CRCO );
|
|
}
|
|
write_register( CONFIG, config ) ;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
rf24_crclength_e RF24::getCRCLength(void)
|
|
{
|
|
rf24_crclength_e result = RF24_CRC_DISABLED;
|
|
uint8_t config = read_register(CONFIG) & ( _BV(CRCO) | _BV(EN_CRC)) ;
|
|
|
|
if ( config & _BV(EN_CRC ) )
|
|
{
|
|
if ( config & _BV(CRCO) )
|
|
result = RF24_CRC_16;
|
|
else
|
|
result = RF24_CRC_8;
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
|
|
void RF24::disableCRC( void )
|
|
{
|
|
uint8_t disable = read_register(CONFIG) & ~_BV(EN_CRC) ;
|
|
write_register( CONFIG, disable ) ;
|
|
}
|
|
|
|
/****************************************************************************/
|
|
void RF24::setRetries(uint8_t delay, uint8_t count)
|
|
{
|
|
write_register(SETUP_RETR,(delay&0xf)<<ARD | (count&0xf)<<ARC);
|
|
}
|
|
|
|
// vim:ai:cin:sts=2 sw=2 ft=cpp
|
|
|