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rf24-pio
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SPI bus speed divider to 4, suggested by Greg Copeland. Also removed duplicated spi setup out of begin(), as it's all in csn()

This commit is contained in:
maniacbug 2011-09-12 19:27:27 -07:00
parent a4cabc66a2
commit a28e2361fc
1 changed files with 5 additions and 11 deletions
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16
RF24.cpp
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@ -28,9 +28,13 @@
void RF24::csn(int mode)
{
// Minimum ideal SPI bus speed is 2x data rate
// If we assume 2Mbs data rate and 16Mhz clock, a
// divider of 4 is the minimum we want.
// CLK:BUS 8Mhz:2Mhz, 16Mhz:4Mhz, or 20Mhz:5Mhz
SPI.setBitOrder(MSBFIRST);
SPI.setDataMode(SPI_MODE0);
SPI.setClockDivider(SPI_CLOCK_DIV2);
SPI.setClockDivider(SPI_CLOCK_DIV4);
digitalWrite(csn_pin,mode);
}
@ -315,17 +319,7 @@ void RF24::begin(void)
pinMode(csn_pin,OUTPUT);
// Initialize SPI bus
// Minimum ideal SPI bus speed is 2x data rate
// If we assume 2Mbs data rate and 16Mhz clock, a
// divider of 4 is the minimum we want.
// CLK:BUS 8Mhz:2Mhz, 16Mhz:4Mhz, or 20Mhz:5Mhz
// We'll use a divider of 2 which will work up to
// MCU speeds of 20Mhz.
// CLK:BUS 8Mhz:4Mhz, 16Mhz:8Mhz, or 20Mhz:10Mhz (max)
SPI.begin();
SPI.setBitOrder(MSBFIRST);
SPI.setDataMode(SPI_MODE0);
SPI.setClockDivider(SPI_CLOCK_DIV2);
ce(LOW);
csn(HIGH);