Now caches the reading pipe 0 and re-sets it when starting to listen.
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e86c6b0f15
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1d28d28a29
9
RF24.cpp
9
RF24.cpp
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@ -314,6 +314,9 @@ void RF24::startListening(void)
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write_register(CONFIG, _BV(EN_CRC) | _BV(PWR_UP) | _BV(PRIM_RX));
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write_register(CONFIG, _BV(EN_CRC) | _BV(PWR_UP) | _BV(PRIM_RX));
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write_register(STATUS, _BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
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write_register(STATUS, _BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
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// Restore the pipe0 adddress
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write_register(RX_ADDR_P0, reinterpret_cast<uint8_t*>(&pipe0_reading_address), 5);
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// Flush buffers
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// Flush buffers
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flush_rx();
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flush_rx();
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@ -495,6 +498,12 @@ void RF24::openReadingPipe(uint8_t child, uint64_t value)
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const uint8_t child_pipe_enable[] = {
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const uint8_t child_pipe_enable[] = {
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ERX_P0, ERX_P1, ERX_P2, ERX_P3, ERX_P4, ERX_P5 };
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ERX_P0, ERX_P1, ERX_P2, ERX_P3, ERX_P4, ERX_P5 };
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// If this is pipe 0, cache the address. This is needed because
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// openWritingPipe() will overwrite the pipe 0 address, so
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// startListening() will have to restore it.
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if (child == 0)
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pipe0_reading_address = value;
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if (child < 5)
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if (child < 5)
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{
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{
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// For pipes 2-5, only write the LSB
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// For pipes 2-5, only write the LSB
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1
RF24.h
1
RF24.h
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@ -23,6 +23,7 @@ private:
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uint8_t payload_size; /**< Fixed size of payloads */
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uint8_t payload_size; /**< Fixed size of payloads */
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boolean ack_payload_available; /**< Whether there is an ack payload waiting */
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boolean ack_payload_available; /**< Whether there is an ack payload waiting */
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uint8_t ack_payload_length; /**< Dynamic size of pending ack payload. Note: not used. */
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uint8_t ack_payload_length; /**< Dynamic size of pending ack payload. Note: not used. */
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uint64_t pipe0_reading_address; /**< Last address set on pipe 0 for reading. */
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protected:
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protected:
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/**
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/**
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