268 lines
7.3 KiB
C
268 lines
7.3 KiB
C
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/**
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******************************************************************************
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* @file stm32f1xx_it.c
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* @brief Interrupt Service Routines.
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******************************************************************************
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*
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* COPYRIGHT(c) 2017 STMicroelectronics
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f1xx_hal.h"
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#include "stm32f1xx.h"
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#include "stm32f1xx_it.h"
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#include "config.h"
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extern DMA_HandleTypeDef hdma_i2c2_rx;
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extern DMA_HandleTypeDef hdma_i2c2_tx;
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extern I2C_HandleTypeDef hi2c2;
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extern DMA_HandleTypeDef hdma_usart2_rx;
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extern DMA_HandleTypeDef hdma_usart2_tx;
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/* External variables --------------------------------------------------------*/
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/******************************************************************************/
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/* Cortex-M3 Processor Interruption and Exception Handlers */
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/******************************************************************************/
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/**
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* @brief This function handles Non maskable interrupt.
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*/
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void NMI_Handler(void) {
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/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
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/* USER CODE END NonMaskableInt_IRQn 0 */
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/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
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/* USER CODE END NonMaskableInt_IRQn 1 */
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}
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/**
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* @brief This function handles Hard fault interrupt.
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*/
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void HardFault_Handler(void) {
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/* USER CODE BEGIN HardFault_IRQn 0 */
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/* USER CODE END HardFault_IRQn 0 */
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while(1) {
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}
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/* USER CODE BEGIN HardFault_IRQn 1 */
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/* USER CODE END HardFault_IRQn 1 */
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}
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/**
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* @brief This function handles Memory management fault.
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*/
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void MemManage_Handler(void) {
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/* USER CODE BEGIN MemoryManagement_IRQn 0 */
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/* USER CODE END MemoryManagement_IRQn 0 */
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while(1) {
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}
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/* USER CODE BEGIN MemoryManagement_IRQn 1 */
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/* USER CODE END MemoryManagement_IRQn 1 */
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}
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/**
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* @brief This function handles Prefetch fault, memory access fault.
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*/
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void BusFault_Handler(void) {
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/* USER CODE BEGIN BusFault_IRQn 0 */
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/* USER CODE END BusFault_IRQn 0 */
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while(1) {
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}
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/* USER CODE BEGIN BusFault_IRQn 1 */
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/* USER CODE END BusFault_IRQn 1 */
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}
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/**
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* @brief This function handles Undefined instruction or illegal state.
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*/
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void UsageFault_Handler(void) {
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/* USER CODE BEGIN UsageFault_IRQn 0 */
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/* USER CODE END UsageFault_IRQn 0 */
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while(1) {
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}
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/* USER CODE BEGIN UsageFault_IRQn 1 */
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/* USER CODE END UsageFault_IRQn 1 */
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}
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/**
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* @brief This function handles System service call via SWI instruction.
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*/
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void SVC_Handler(void) {
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/* USER CODE BEGIN SVCall_IRQn 0 */
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/* USER CODE END SVCall_IRQn 0 */
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/* USER CODE BEGIN SVCall_IRQn 1 */
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/* USER CODE END SVCall_IRQn 1 */
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}
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/**
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* @brief This function handles Debug monitor.
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*/
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void DebugMon_Handler(void) {
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/* USER CODE BEGIN DebugMonitor_IRQn 0 */
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/* USER CODE END DebugMonitor_IRQn 0 */
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/* USER CODE BEGIN DebugMonitor_IRQn 1 */
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/* USER CODE END DebugMonitor_IRQn 1 */
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}
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/**
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* @brief This function handles Pendable request for system service.
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*/
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void PendSV_Handler(void) {
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/* USER CODE BEGIN PendSV_IRQn 0 */
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/* USER CODE END PendSV_IRQn 0 */
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/* USER CODE BEGIN PendSV_IRQn 1 */
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/* USER CODE END PendSV_IRQn 1 */
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}
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/**
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* @brief This function handles System tick timer.
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*/
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#ifdef CONTROL_PPM
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void PPM_SysTick_Callback(void);
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#endif
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void SysTick_Handler(void) {
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/* USER CODE BEGIN SysTick_IRQn 0 */
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/* USER CODE END SysTick_IRQn 0 */
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HAL_IncTick();
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HAL_SYSTICK_IRQHandler();
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/* USER CODE BEGIN SysTick_IRQn 1 */
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#ifdef CONTROL_PPM
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PPM_SysTick_Callback();
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#endif
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/* USER CODE END SysTick_IRQn 1 */
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}
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#ifdef CONTROL_NUNCHUCK
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extern I2C_HandleTypeDef hi2c2;
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void I2C1_EV_IRQHandler(void)
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{
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HAL_I2C_EV_IRQHandler(&hi2c2);
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}
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void I2C1_ER_IRQHandler(void)
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{
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HAL_I2C_ER_IRQHandler(&hi2c2);
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}
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/**
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* @brief This function handles DMA1 channel4 global interrupt.
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*/
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void DMA1_Channel4_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
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/* USER CODE END DMA1_Channel4_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_i2c2_tx);
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/* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
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/* USER CODE END DMA1_Channel4_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 channel5 global interrupt.
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*/
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void DMA1_Channel5_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
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/* USER CODE END DMA1_Channel5_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_i2c2_rx);
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/* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
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/* USER CODE END DMA1_Channel5_IRQn 1 */
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}
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#endif
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#ifdef CONTROL_PPM
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void EXTI3_IRQHandler(void)
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{
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PPM_ISR_Callback();
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__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_3);
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}
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#endif
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#ifdef CONTROL_SERIAL_USART2
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void DMA1_Channel6_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
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/* USER CODE END DMA1_Channel4_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart2_rx);
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/* USER CODE BEGIN DMA1_Channel4_IRQn 1 */
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/* USER CODE END DMA1_Channel4_IRQn 1 */
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}
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/**
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* @brief This function handles DMA1 channel5 global interrupt.
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*/
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void DMA1_Channel7_IRQHandler(void)
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{
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/* USER CODE BEGIN DMA1_Channel5_IRQn 0 */
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/* USER CODE END DMA1_Channel5_IRQn 0 */
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HAL_DMA_IRQHandler(&hdma_usart2_tx);
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/* USER CODE BEGIN DMA1_Channel5_IRQn 1 */
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/* USER CODE END DMA1_Channel5_IRQn 1 */
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}
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#endif
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/******************************************************************************/
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/* STM32F1xx Peripheral Interrupt Handlers */
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/* Add here the Interrupt Handlers for the used peripherals. */
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/* For the available peripheral interrupt handler names, */
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/* please refer to the startup file (startup_stm32f1xx.s). */
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/******************************************************************************/
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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