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add input output buffer board, started baseplate
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(export (version D)
(design
widen silkscreen on pcie connector footprint
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(source /media/fisch/HDD/Projects/audiomixer/schematic/baseplate_in_output/baseplate_in_output.sch)
(date "Di 18 Jun 2019 11:16:57 CEST")
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(tool "Eeschema 5.0.2-bee76a0~70~ubuntu16.04.1")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title)
(company)
(rev)
(date)
(source baseplate_in_output.sch)
(comment (number 1) (value ""))
(comment (number 2) (value ""))
(comment (number 3) (value ""))
(comment (number 4) (value "")))))
(components
(comp (ref inA1)
(value Conn_01x02)
add baseplate edgesolderstrips
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(footprint footprints:coax_solder_pad_flipped)
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(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_01x02) (description "Generic connector, single row, 01x02, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CB2B45C))
(comp (ref inB1)
(value Conn_01x02)
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(footprint footprints:coax_solder_pad_flipped)
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(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_01x02) (description "Generic connector, single row, 01x02, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CB2D8FB))
(comp (ref outA1)
(value Conn_01x02)
(footprint footprints:coax_solder_pad)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_01x02) (description "Generic connector, single row, 01x02, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CB301F1))
(comp (ref outB1)
(value Conn_01x02)
(footprint footprints:coax_solder_pad)
(datasheet ~)
(libsource (lib Connector_Generic) (part Conn_01x02) (description "Generic connector, single row, 01x02, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CB3167B))
change pcie pinout
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(comp (ref J1)
(value Conn_02x18_Row_Letter_Last)
(footprint footprints:PCIexpress_1x_connector)
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(datasheet ~)
change pcie pinout
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(libsource (lib Connector_Generic) (part Conn_02x18_Row_Letter_Last) (description "Generic connector, double row, 02x18, row letter last pin numbering scheme (pin number consists of a letter for the row and a number for the pin index in this row. 1a, ..., Na; 1b, ..., Nb)), script generated (kicad-library-utils/schlib/autogen/connector/)"))
add input output buffer board, started baseplate
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(sheetpath (names /) (tstamps /))
add baseplate edgesolderstrips
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(tstamp 5CB5100B))
(comp (ref J2)
(value -15V)
(footprint footprints:edge_solderstrip_1mm5x6mm)
(datasheet ~)
(libsource (lib Connector) (part Conn_01x01_Male) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CD03267))
(comp (ref J3)
(value GND)
(footprint footprints:edge_solderstrip_1mm5x6mm)
(datasheet ~)
(libsource (lib Connector) (part Conn_01x01_Male) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CD03404))
(comp (ref J4)
(value +15V)
(footprint footprints:edge_solderstrip_1mm5x6mm)
(datasheet ~)
(libsource (lib Connector) (part Conn_01x01_Male) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CD03422))
(comp (ref J5)
(value -15V)
(footprint footprints:edge_solderstrip_1mm5x6mm)
(datasheet ~)
(libsource (lib Connector) (part Conn_01x01_Male) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CD08F50))
(comp (ref J6)
(value GND)
(footprint footprints:edge_solderstrip_1mm5x6mm)
(datasheet ~)
(libsource (lib Connector) (part Conn_01x01_Male) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CD08F56))
(comp (ref J7)
(value +15V)
(footprint footprints:edge_solderstrip_1mm5x6mm)
(datasheet ~)
(libsource (lib Connector) (part Conn_01x01_Male) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CD08F5C))
(comp (ref J9)
(value GND)
(footprint footprints:edge_solderstrip_th)
(datasheet ~)
(libsource (lib Connector) (part Conn_01x01_Male) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CD1356B))
(comp (ref J10)
(value GND)
(footprint footprints:edge_solderstrip_th)
(datasheet ~)
(libsource (lib Connector) (part Conn_01x01_Male) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CD1363E))
(comp (ref J11)
(value GND)
(footprint footprints:edge_solderstrip_th)
(datasheet ~)
(libsource (lib Connector) (part Conn_01x01_Male) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CD13668))
(comp (ref J8)
(value GND)
(footprint footprints:edge_solderstrip_th)
(datasheet ~)
(libsource (lib Connector) (part Conn_01x01_Male) (description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)"))
(sheetpath (names /) (tstamps /))
(tstamp 5CD13694)))
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(libparts
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(libpart (lib Connector) (part Conn_01x01_Male)
(description "Generic connector, single row, 01x01, script generated (kicad-library-utils/schlib/autogen/connector/)")
(docs ~)
(footprints
(fp Connector*:*))
(fields
(field (name Reference) J)
(field (name Value) Conn_01x01_Male))
(pins
(pin (num 1) (name Pin_1) (type passive))))
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(libpart (lib Connector_Generic) (part Conn_01x02)
(description "Generic connector, single row, 01x02, script generated (kicad-library-utils/schlib/autogen/connector/)")
(docs ~)
(footprints
(fp Connector*:*_1x??_*))
(fields
(field (name Reference) J)
(field (name Value) Conn_01x02))
(pins
(pin (num 1) (name Pin_1) (type passive))
(pin (num 2) (name Pin_2) (type passive))))
change pcie pinout
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(libpart (lib Connector_Generic) (part Conn_02x18_Row_Letter_Last)
(description "Generic connector, double row, 02x18, row letter last pin numbering scheme (pin number consists of a letter for the row and a number for the pin index in this row. 1a, ..., Na; 1b, ..., Nb)), script generated (kicad-library-utils/schlib/autogen/connector/)")
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(docs ~)
(footprints
(fp Connector*:*_2x??_*))
(fields
(field (name Reference) J)
change pcie pinout
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(field (name Value) Conn_02x18_Row_Letter_Last))
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(pins
change pcie pinout
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(pin (num 1a) (name Pin_1a) (type passive))
(pin (num 1b) (name Pin_1b) (type passive))
(pin (num 2a) (name Pin_2a) (type passive))
(pin (num 2b) (name Pin_2b) (type passive))
(pin (num 3a) (name Pin_3a) (type passive))
(pin (num 3b) (name Pin_3b) (type passive))
(pin (num 4a) (name Pin_4a) (type passive))
(pin (num 4b) (name Pin_4b) (type passive))
(pin (num 5a) (name Pin_5a) (type passive))
(pin (num 5b) (name Pin_5b) (type passive))
(pin (num 6a) (name Pin_6a) (type passive))
(pin (num 6b) (name Pin_6b) (type passive))
(pin (num 7a) (name Pin_7a) (type passive))
(pin (num 7b) (name Pin_7b) (type passive))
(pin (num 8a) (name Pin_8a) (type passive))
(pin (num 8b) (name Pin_8b) (type passive))
(pin (num 9a) (name Pin_9a) (type passive))
(pin (num 9b) (name Pin_9b) (type passive))
(pin (num 10a) (name Pin_10a) (type passive))
(pin (num 10b) (name Pin_10b) (type passive))
(pin (num 11a) (name Pin_11a) (type passive))
(pin (num 11b) (name Pin_11b) (type passive))
(pin (num 12a) (name Pin_12a) (type passive))
(pin (num 12b) (name Pin_12b) (type passive))
(pin (num 13a) (name Pin_13a) (type passive))
(pin (num 13b) (name Pin_13b) (type passive))
(pin (num 14a) (name Pin_14a) (type passive))
(pin (num 14b) (name Pin_14b) (type passive))
(pin (num 15a) (name Pin_15a) (type passive))
(pin (num 15b) (name Pin_15b) (type passive))
(pin (num 16a) (name Pin_16a) (type passive))
(pin (num 16b) (name Pin_16b) (type passive))
(pin (num 17a) (name Pin_17a) (type passive))
(pin (num 17b) (name Pin_17b) (type passive))
(pin (num 18a) (name Pin_18a) (type passive))
(pin (num 18b) (name Pin_18b) (type passive)))))
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(libraries
add baseplate edgesolderstrips
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(library (logical Connector)
(uri /usr/share/kicad/library/Connector.lib))
add input output buffer board, started baseplate
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(library (logical Connector_Generic)
(uri /usr/share/kicad/library/Connector_Generic.lib)))
(nets
add baseplate edgesolderstrips
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(net (code 1) (name GNDA)
change pcie pinout
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(node (ref J1) (pin 17a))
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(node (ref J3) (pin 1))
(node (ref J8) (pin 1))
(node (ref J11) (pin 1))
(node (ref outA1) (pin 1))
change pcie pinout
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(node (ref J1) (pin 15b))
(node (ref J1) (pin 15a))
(node (ref J1) (pin 13a))
add baseplate edgesolderstrips
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(node (ref J1) (pin 12b))
change pcie pinout
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(node (ref J1) (pin 11b))
(node (ref J1) (pin 11a))
add baseplate edgesolderstrips
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(node (ref J1) (pin 10a))
(node (ref J6) (pin 1))
(node (ref outB1) (pin 1))
change pcie pinout
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(node (ref J1) (pin 10b))
(node (ref J1) (pin 6b))
(node (ref J1) (pin 5b))
add baseplate edgesolderstrips
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(node (ref J1) (pin 5a))
change pcie pinout
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(node (ref J1) (pin 4b))
(node (ref J1) (pin 4a))
add baseplate edgesolderstrips
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(node (ref J1) (pin 18b))
(node (ref J1) (pin 6a))
(node (ref J10) (pin 1))
(node (ref J9) (pin 1)))
(net (code 2) (name inB-)
(node (ref J1) (pin 16a))
(node (ref inB1) (pin 2)))
(net (code 3) (name inB+)
(node (ref inB1) (pin 1))
(node (ref J1) (pin 18a)))
(net (code 4) (name -15V)
change pcie pinout
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(node (ref J1) (pin 3b))
add baseplate edgesolderstrips
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(node (ref J1) (pin 1a))
change pcie pinout
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(node (ref J1) (pin 1b))
add baseplate edgesolderstrips
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(node (ref J1) (pin 2a))
(node (ref J1) (pin 2b))
(node (ref J1) (pin 3a))
(node (ref J5) (pin 1))
(node (ref J2) (pin 1)))
(net (code 5) (name +15V)
(node (ref J1) (pin 9b))
(node (ref J7) (pin 1))
(node (ref J1) (pin 9a))
(node (ref J1) (pin 8b))
(node (ref J4) (pin 1))
(node (ref J1) (pin 8a))
(node (ref J1) (pin 7b))
(node (ref J1) (pin 7a)))
(net (code 6) (name inA-)
change pcie pinout
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(node (ref J1) (pin 12a))
add baseplate edgesolderstrips
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(node (ref inA1) (pin 2)))
(net (code 7) (name inA+)
(node (ref J1) (pin 14a))
add input output buffer board, started baseplate
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(node (ref inA1) (pin 1)))
add baseplate edgesolderstrips
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(net (code 8) (name outA)
(node (ref J1) (pin 13b))
(node (ref J1) (pin 14b))
(node (ref outA1) (pin 2)))
(net (code 9) (name outB)
(node (ref J1) (pin 16b))
(node (ref outB1) (pin 2))
(node (ref J1) (pin 17b)))))