matemat/uart.lst

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14 KiB
Plaintext

1 .file "uart.c"
2 __SREG__ = 0x3f
3 __SP_H__ = 0x3e
4 __SP_L__ = 0x3d
5 __CCP__ = 0x34
6 __tmp_reg__ = 0
7 __zero_reg__ = 1
15 .Ltext0:
16 .global __vector_11
18 __vector_11:
19 .LFB0:
20 .LM1:
21 0000 1F92 push __zero_reg__
22 0002 0F92 push r0
23 0004 0FB6 in r0,__SREG__
24 0006 0F92 push r0
25 0008 1124 clr __zero_reg__
26 000a 2F93 push r18
27 000c 8F93 push r24
28 000e 9F93 push r25
29 0010 EF93 push r30
30 0012 FF93 push r31
31 /* prologue: Signal */
32 /* frame size = 0 */
33 /* stack size = 8 */
34 .L__stack_usage = 8
35 .LM2:
36 0014 8BB1 in r24,43-32
37 .LVL0:
38 .LM3:
39 0016 9CB1 in r25,44-32
40 .LVL1:
41 .LM4:
42 0018 E091 0000 lds r30,UART_RxHead
43 001c EF5F subi r30,lo8(-(1))
44 001e EF71 andi r30,lo8(31)
45 .LVL2:
46 .LM5:
47 0020 2091 0000 lds r18,UART_RxTail
48 0024 E217 cp r30,r18
49 0026 01F0 breq .L3
50 .LM6:
51 0028 8871 andi r24,lo8(24)
52 .LVL3:
53 .LM7:
54 002a E093 0000 sts UART_RxHead,r30
55 .LM8:
56 002e F0E0 ldi r31,lo8(0)
57 0030 E050 subi r30,lo8(-(UART_RxBuf))
58 0032 F040 sbci r31,hi8(-(UART_RxBuf))
59 .LVL4:
60 0034 9083 st Z,r25
61 0036 00C0 rjmp .L2
62 .LVL5:
63 .L3:
64 .LM9:
65 0038 82E0 ldi r24,lo8(2)
66 .LVL6:
67 .L2:
68 .LM10:
69 003a 8093 0000 sts UART_LastRxError,r24
70 /* epilogue start */
71 .LM11:
72 003e FF91 pop r31
73 0040 EF91 pop r30
74 0042 9F91 pop r25
75 .LVL7:
76 0044 8F91 pop r24
77 .LVL8:
78 0046 2F91 pop r18
79 0048 0F90 pop r0
80 004a 0FBE out __SREG__,r0
81 004c 0F90 pop r0
82 004e 1F90 pop __zero_reg__
83 0050 1895 reti
84 .LFE0:
86 .global __vector_12
88 __vector_12:
89 .LFB1:
90 .LM12:
91 0052 1F92 push __zero_reg__
92 0054 0F92 push r0
93 0056 0FB6 in r0,__SREG__
94 0058 0F92 push r0
95 005a 1124 clr __zero_reg__
96 005c 8F93 push r24
97 005e 9F93 push r25
98 0060 EF93 push r30
99 0062 FF93 push r31
100 /* prologue: Signal */
101 /* frame size = 0 */
102 /* stack size = 7 */
103 .L__stack_usage = 7
104 .LM13:
105 0064 9091 0000 lds r25,UART_TxHead
106 0068 8091 0000 lds r24,UART_TxTail
107 006c 9817 cp r25,r24
108 006e 01F0 breq .L5
109 .LM14:
110 0070 E091 0000 lds r30,UART_TxTail
111 0074 EF5F subi r30,lo8(-(1))
112 0076 EF71 andi r30,lo8(31)
113 .LVL9:
114 .LM15:
115 0078 E093 0000 sts UART_TxTail,r30
116 .LM16:
117 007c F0E0 ldi r31,lo8(0)
118 007e E050 subi r30,lo8(-(UART_TxBuf))
119 0080 F040 sbci r31,hi8(-(UART_TxBuf))
120 .LVL10:
121 0082 8081 ld r24,Z
122 0084 8CB9 out 44-32,r24
123 0086 00C0 rjmp .L4
124 .LVL11:
125 .L5:
126 .LM17:
127 0088 5598 cbi 42-32,5
128 .L4:
129 /* epilogue start */
130 .LM18:
131 008a FF91 pop r31
132 008c EF91 pop r30
133 008e 9F91 pop r25
134 0090 8F91 pop r24
135 0092 0F90 pop r0
136 0094 0FBE out __SREG__,r0
137 0096 0F90 pop r0
138 0098 1F90 pop __zero_reg__
139 009a 1895 reti
140 .LFE1:
142 .global uart_init
144 uart_init:
145 .LFB2:
146 .LM19:
147 .LVL12:
148 /* prologue: function */
149 /* frame size = 0 */
150 /* stack size = 0 */
151 .L__stack_usage = 0
152 .LM20:
153 009c 1092 0000 sts UART_TxHead,__zero_reg__
154 .LM21:
155 00a0 1092 0000 sts UART_TxTail,__zero_reg__
156 .LM22:
157 00a4 1092 0000 sts UART_RxHead,__zero_reg__
158 .LM23:
159 00a8 1092 0000 sts UART_RxTail,__zero_reg__
160 .LM24:
161 00ac 97FF sbrs r25,7
162 00ae 00C0 rjmp .L8
163 .LM25:
164 00b0 22E0 ldi r18,lo8(2)
165 00b2 2BB9 out 43-32,r18
166 .LM26:
167 00b4 9F77 andi r25,hi8(32767)
168 .LVL13:
169 .L8:
170 .LM27:
171 00b6 90BD out 64-32,r25
172 .LM28:
173 00b8 89B9 out 41-32,r24
174 .LM29:
175 00ba 88E9 ldi r24,lo8(-104)
176 .LVL14:
177 00bc 8AB9 out 42-32,r24
178 .LM30:
179 00be 86E8 ldi r24,lo8(-122)
180 00c0 80BD out 64-32,r24
181 /* epilogue start */
182 .LM31:
183 00c2 0895 ret
184 .LFE2:
186 .global uart_getc
188 uart_getc:
189 .LFB3:
190 .LM32:
191 /* prologue: function */
192 /* frame size = 0 */
193 /* stack size = 0 */
194 .L__stack_usage = 0
195 .LM33:
196 00c4 9091 0000 lds r25,UART_RxHead
197 00c8 8091 0000 lds r24,UART_RxTail
198 00cc 9817 cp r25,r24
199 00ce 01F0 breq .L11
200 .LM34:
201 00d0 E091 0000 lds r30,UART_RxTail
202 00d4 EF5F subi r30,lo8(-(1))
203 00d6 EF71 andi r30,lo8(31)
204 .LVL15:
205 .LM35:
206 00d8 E093 0000 sts UART_RxTail,r30
207 .LM36:
208 00dc F0E0 ldi r31,lo8(0)
209 00de E050 subi r30,lo8(-(UART_RxBuf))
210 00e0 F040 sbci r31,hi8(-(UART_RxBuf))
211 .LVL16:
212 00e2 8081 ld r24,Z
213 .LVL17:
214 .LM37:
215 00e4 9091 0000 lds r25,UART_LastRxError
216 00e8 392F mov r19,r25
217 00ea 20E0 ldi r18,lo8(0)
218 00ec 280F add r18,r24
219 00ee 311D adc r19,__zero_reg__
220 00f0 00C0 rjmp .L10
221 .LVL18:
222 .L11:
223 .LM38:
224 00f2 20E0 ldi r18,lo8(256)
225 00f4 31E0 ldi r19,hi8(256)
226 .L10:
227 .LM39:
228 00f6 C901 movw r24,r18
229 /* epilogue start */
230 00f8 0895 ret
231 .LFE3:
233 .global uart_putc
235 uart_putc:
236 .LFB4:
237 .LM40:
238 .LVL19:
239 /* prologue: function */
240 /* frame size = 0 */
241 /* stack size = 0 */
242 .L__stack_usage = 0
243 .LM41:
244 00fa 9091 0000 lds r25,UART_TxHead
245 00fe 9F5F subi r25,lo8(-(1))
246 0100 9F71 andi r25,lo8(31)
247 .LVL20:
248 .L13:
249 .LM42:
250 0102 2091 0000 lds r18,UART_TxTail
251 0106 9217 cp r25,r18
252 0108 01F0 breq .L13
253 .LM43:
254 010a E92F mov r30,r25
255 010c F0E0 ldi r31,lo8(0)
256 010e E050 subi r30,lo8(-(UART_TxBuf))
257 0110 F040 sbci r31,hi8(-(UART_TxBuf))
258 0112 8083 st Z,r24
259 .LM44:
260 0114 9093 0000 sts UART_TxHead,r25
261 .LM45:
262 0118 559A sbi 42-32,5
263 /* epilogue start */
264 .LM46:
265 011a 0895 ret
266 .LFE4:
268 .global uart_puts
270 uart_puts:
271 .LFB5:
272 .LM47:
273 .LVL21:
274 011c EF92 push r14
275 011e FF92 push r15
276 0120 CF93 push r28
277 0122 DF93 push r29
278 /* prologue: function */
279 /* frame size = 0 */
280 /* stack size = 4 */
281 .L__stack_usage = 4
282 .LM48:
283 0124 E82E mov r14,r24
284 0126 E701 movw r28,r14
285 0128 7E01 movw r14,r28
286 012a F92E mov r15,r25
287 012c E701 movw r28,r14
288 .LM49:
289 012e 00C0 rjmp .L16
290 .LVL22:
291 .L17:
292 .LM50:
293 0130 0E94 0000 call uart_putc
294 .L16:
295 .LM51:
296 0134 8991 ld r24,Y+
297 0136 8823 tst r24
298 0138 01F4 brne .L17
299 /* epilogue start */
300 .LM52:
301 013a DF91 pop r29
302 013c CF91 pop r28
303 013e FF90 pop r15
304 0140 EF90 pop r14
305 0142 0895 ret
306 .LFE5:
308 .global uart_puts_p
310 uart_puts_p:
311 .LFB6:
312 .LM53:
313 .LVL23:
314 0144 CF93 push r28
315 0146 DF93 push r29
316 /* prologue: function */
317 /* frame size = 0 */
318 /* stack size = 2 */
319 .L__stack_usage = 2
320 0148 EC01 movw r28,r24
321 .LM54:
322 014a 00C0 rjmp .L19
323 .LVL24:
324 .L20:
325 .LM55:
326 014c 0E94 0000 call uart_putc
327 .LVL25:
328 .L19:
329 .LM56:
330 0150 FE01 movw r30,r28
331 .LVL26:
332 .LBB2:
333 .LM57:
334 0152 2196 adiw r28,1
335 .LVL27:
336 /* #APP */
337 ; 538 "uart.c" 1
338 0154 8491 lpm r24, Z
339
340 ; 0 "" 2
341 .LVL28:
342 /* #NOAPP */
343 .LBE2:
344 0156 8823 tst r24
345 0158 01F4 brne .L20
346 /* epilogue start */
347 .LM58:
348 015a DF91 pop r29
349 015c CF91 pop r28
350 .LVL29:
351 015e 0895 ret
352 .LFE6:
354 .global uart_available
356 uart_available:
357 .LFB7:
358 .LM59:
359 /* prologue: function */
360 /* frame size = 0 */
361 /* stack size = 0 */
362 .L__stack_usage = 0
363 .LM60:
364 0160 8091 0000 lds r24,UART_RxHead
365 0164 2091 0000 lds r18,UART_RxTail
366 0168 90E0 ldi r25,lo8(0)
367 016a 4F96 adiw r24,31
368 016c 821B sub r24,r18
369 016e 9109 sbc r25,__zero_reg__
370 0170 6FE1 ldi r22,lo8(31)
371 0172 70E0 ldi r23,hi8(31)
372 0174 0E94 0000 call __divmodhi4
373 /* epilogue start */
374 .LM61:
375 0178 0895 ret
376 .LFE7:
378 .global uart_flush
380 uart_flush:
381 .LFB8:
382 .LM62:
383 /* prologue: function */
384 /* frame size = 0 */
385 /* stack size = 0 */
386 .L__stack_usage = 0
387 .LM63:
388 017a 8091 0000 lds r24,UART_RxTail
389 017e 8093 0000 sts UART_RxHead,r24
390 /* epilogue start */
391 .LM64:
392 0182 0895 ret
393 .LFE8:
395 .lcomm UART_RxTail,1
396 .lcomm UART_RxHead,1
397 .lcomm UART_TxHead,1
398 .lcomm UART_TxTail,1
399 .lcomm UART_TxBuf,32
400 .lcomm UART_RxBuf,32
401 .lcomm UART_LastRxError,1
490 .Letext0:
DEFINED SYMBOLS
*ABS*:0000000000000000 uart.c
/tmp/ccUnbh69.s:2 *ABS*:000000000000003f __SREG__
/tmp/ccUnbh69.s:3 *ABS*:000000000000003e __SP_H__
/tmp/ccUnbh69.s:4 *ABS*:000000000000003d __SP_L__
/tmp/ccUnbh69.s:5 *ABS*:0000000000000034 __CCP__
/tmp/ccUnbh69.s:6 *ABS*:0000000000000000 __tmp_reg__
/tmp/ccUnbh69.s:7 *ABS*:0000000000000001 __zero_reg__
/tmp/ccUnbh69.s:18 .text:0000000000000000 __vector_11
/tmp/ccUnbh69.s:395 .bss:0000000000000001 UART_RxHead
.bss:0000000000000000 UART_RxTail
/tmp/ccUnbh69.s:399 .bss:0000000000000024 UART_RxBuf
/tmp/ccUnbh69.s:400 .bss:0000000000000044 UART_LastRxError
/tmp/ccUnbh69.s:88 .text:0000000000000052 __vector_12
/tmp/ccUnbh69.s:396 .bss:0000000000000002 UART_TxHead
/tmp/ccUnbh69.s:397 .bss:0000000000000003 UART_TxTail
/tmp/ccUnbh69.s:398 .bss:0000000000000004 UART_TxBuf
/tmp/ccUnbh69.s:144 .text:000000000000009c uart_init
/tmp/ccUnbh69.s:188 .text:00000000000000c4 uart_getc
/tmp/ccUnbh69.s:235 .text:00000000000000fa uart_putc
/tmp/ccUnbh69.s:270 .text:000000000000011c uart_puts
/tmp/ccUnbh69.s:310 .text:0000000000000144 uart_puts_p
/tmp/ccUnbh69.s:356 .text:0000000000000160 uart_available
/tmp/ccUnbh69.s:380 .text:000000000000017a uart_flush
UNDEFINED SYMBOLS
__divmodhi4
__do_clear_bss