fancy new display driver
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@ -5,7 +5,11 @@
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#define LINEBYTES (((NUM_COLS-1)/8)+1)
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extern unsigned char pixmap[NUMPLANE][NUM_ROWS][LINEBYTES];
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#ifndef BORG_FRAMEBUF
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extern unsigned char pixmap[NUMPLANE][NUM_ROWS][LINEBYTES];
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#else /* BORG_FRAMEBUF */
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unsigned char framebuf[NUM_ROWS][NUM_COLS];
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#endif /* BORG_FRAMEBUF */
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void watchdog_enable();
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void borg_hw_init();
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@ -4,6 +4,7 @@
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#include <avr/interrupt.h>
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#include <avr/io.h>
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#include <avr/wdt.h>
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#include <util/delay.h>
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#include "borg_hw.h"
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/*
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@ -38,16 +39,18 @@
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#define TIMER0_COMP_vect TIMER0_COMPA_vect
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#endif
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//lookup table
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uint16_t colormap[256] = {0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,29,31,34,36,39,42,45,48,51,55,58,62,65,69,73,77,81,85,90,94,99,103,108,113,118,123,129,134,140,145,151,157,163,169,176,182,188,195,202,209,216,223,230,238,245,253,261,269,277,285,293,302,310,319,328,337,346,355,365,374,384,394,404,414,424,434,445,455,466,477,488,499,510,522,533,545,557,569,581,593,606,618,631,644,657,670,683,696,710,723,737,751,765,779,794,808,823,838,853,868,883,898,914,930,945,961,978,994,1010,1027,1043,1060,1077,1094,1112,1129,1147,1164,1182,1200,1218,1237,1255,1274,1293,1311,1331,1350,1369,1389,1408,1428,1448,1468,1488,1509,1529,1550,1571,1592,1613,1635,1656,1678,1700,1721,1744,1766,1788,1811,1834,1856,1879,1903,1926,1949,1973,1997,2021,2045,2069,2094,2118,2143,2168,2193,2218,2244,2269,2295,2321,2347,2373,2399,2426,2452,2479,2506,2533,2560,2588,2615,2643,2671,2699,2727,2756,2784,2813,2842,2871,2900,2929,2959,2989,3018,3048,3079,3109,3139,3170,3201,3232,3263,3294,3326,3357,3389,3421,3453,3485,3518,3550,3583,3616,3649,3682,3716,3749,3783,3817,3851,3886,3920,3955,3989,4024,4059,4094};
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// buffer which holds the currently shown frame
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unsigned char pixmap[NUMPLANE][NUM_ROWS][LINEBYTES];
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unsigned char framebuf[NUM_ROWS][NUM_COLS];
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// switch to next row
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static void nextrow(uint8_t row) {
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//row counter
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static unsigned char row = 0;
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//switch to next row
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static void nextrow() {
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unsigned char i;
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static unsigned char row = 0;
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//increment & wrap row counter
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if (++row == NUM_ROWS) row = 0;
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// short delay loop, to ensure proper deactivation of the drivers
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for (i = 0; i < 10; i++) asm volatile("nop");
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@ -75,92 +78,114 @@ static void nextrow(uint8_t row) {
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ROWPORT |= (1 << PIN_CLK);
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ROWPORT &= ~(1 << PIN_CLK);
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}
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// another delay loop, to ensure that the drivers are ready
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for (i = 0; i < 20; i++) asm volatile("nop");
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}
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// show a row
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/*
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static void rowshow(unsigned char row, unsigned char plane) {
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// depending on the currently drawn plane, display the row for a specific
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// amount of time
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static unsigned char const ocr_table[] = {3, 4, 22};
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OCR0 = ocr_table[plane];
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// output data of the current row to the column drivers
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uint8_t tmp, tmp1;
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row = (row>>1) + ((row & 0x01)?8:0 );
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tmp = pixmap[plane][row][0];
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tmp1 = pixmap[plane][row][1];
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#ifdef REVERSE_COLS
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tmp = (tmp >> 4) | (tmp << 4);
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tmp = ((tmp & 0xcc) >> 2) | ((tmp & 0x33)<< 2); //0xcc = 11001100, 0x33 = 00110011
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tmp = ((tmp & 0xaa) >> 1) | ((tmp & 0x55)<< 1); //0xaa = 10101010, 0x55 = 1010101
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TLCPORT2 = tmp;
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tmp = tmp1;
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tmp = (tmp >> 4) | (tmp << 4);
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tmp = ((tmp & 0xcc) >> 2) | ((tmp & 0x33) << 2); //0xcc = 11001100, 0x33 = 00110011
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tmp = ((tmp & 0xaa) >> 1) | ((tmp & 0x55) << 1); //0xaa = 10101010, 0x55 = 1010101
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TLCPORT1 = tmp;
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#else
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TLCPORT1 = tmp;
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TLCPORT2 = tmp1;
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#endif
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}
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*/
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//this int runs with multiples of half the frequency of timer 1,
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//meaning that new row data gets laoded every 2n pwm periods of the tlc
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ISR(TIMER0_COMP_vect ) {
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uint8_t i, x;
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uint8_t y, x, v;
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// reset watchdog
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wdt_reset();
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//increment & wrap row counter
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if (++row == NUM_ROWS) row = 0;
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//sync to timer 1
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while(!(TIFR1 & _BV(OCF1A)));
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//shift pixmap as 12 bit words into device
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for(y = 0; y < 16; y++) //16 x 12bit
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{
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//fetch msb
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v = (colormap[framebuf[row][y]] >> 4) & 0xF0;
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//12
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= (v & 0x80) >> (7-TLC_PIN_SIN);
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SCLK();
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v <<= 1;
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//11
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= (v & 0x80) >> (7-TLC_PIN_SIN);
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SCLK();
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v <<= 1;
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//10
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= (v & 0x80) >> (7-TLC_PIN_SIN);
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SCLK();
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v <<= 1;
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//9
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= (v & 0x80) >> (7-TLC_PIN_SIN);
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SCLK();
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v <<= 1;
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//fetch lsb
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v = (colormap[framebuf[row][y]]) & 0xFF;
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//8
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= (v & 0x80) >> (7-TLC_PIN_SIN);
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SCLK();
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v <<= 1;
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//7
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= (v & 0x80) >> (7-TLC_PIN_SIN);
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SCLK();
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v <<= 1;
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//6
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= (v & 0x80) >> (7-TLC_PIN_SIN);
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SCLK();
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v <<= 1;
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//5
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= (v & 0x80) >> (7-TLC_PIN_SIN);
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SCLK();
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v <<= 1;
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//4
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= (v & 0x80) >> (7-TLC_PIN_SIN);
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SCLK();
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v <<= 1;
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//3
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= (v & 0x80) >> (7-TLC_PIN_SIN);
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SCLK();
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v <<= 1;
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//2
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= (v & 0x80) >> (7-TLC_PIN_SIN);
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SCLK();
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v <<= 1;
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//1
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= (v & 0x80) >> (7-TLC_PIN_SIN);
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SCLK();
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v <<= 1;
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}
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//blank outputs of low-side (column) driver
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TLCPORT |= _BV(TLC_PIN_BLANK);
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//disable timer 1
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TCCR1B &= ~_BV(CS10);
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// switch rows
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nextrow(row);
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// output current row according to current plane
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//rowshow(row, plane);
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//debug: load 100% duty cycle into column driver
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for(i = 0; i < 16; i++) //16 x 12bit
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{
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//shift in 12 bit words
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for(x = 0; x < 12; x++)
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{
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= ((uint8_t)((uint16_t)0xFFF >> x) & 1) << TLC_PIN_SIN;
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SCLK();
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}
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}
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//switch rows
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nextrow();
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//latch data, disable blanking, enable and reset timers
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XLAT();
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TCNT1 = 0;
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TIFR1 = _BV(OCF1A)
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TLCPORT &= ~_BV(TLC_PIN_BLANK);
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TCNT0 = 0; //be a little faster than timer 1
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TCCR1B |= _BV(CS10); // clk/1
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}
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ISR(TIMER1_COMPA_vect)
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{
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TLCPORT |= _BV(TLC_PIN_BLANK);
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TLCPORT &= ~_BV(TLC_PIN_BLANK);
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//reset timer
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TCNT0 = 0;
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}
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TCCR0A = 0x02; // CTC Mode
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TCCR0B = 0x04; // clk/256
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TCNT0 = 0; // reset timer
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OCR0 = 0xFF; // compare with this value
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OCR0 = 16; // compare with this value
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TIMSK0 = 0x02; // compare match Interrupt on
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#else
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TCCR0 = 0x0C; // CTC Mode, clk/256
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TCNT0 = 0; // reset timer
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OCR0 = 0xFF; // compare with this value
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OCR0 = 16; // compare with this value
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TIMSK = 0x02; // compare match Interrupt on
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#endif
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//setup timer1 also (for blanking pulse)
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TCCR1A = 0x00;
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TCCR0B = _BV(WGM12); // CTC Mode
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OCR1A = 8192; // top value
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TIMSK1 = _BV(OCIE1A); // compare match interrupt on
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}
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SCLK();
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}
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void test_tlc()
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{
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uint8_t i, x;
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while(1)
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{
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//debug: load 100% duty cycle into column driver
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for(i = 0; i < 16; i++) //16 x 12bit
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{
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//shift in 12 bit words
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for(x = 0; x < 12; x++)
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{
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TLCPORT &= ~_BV(TLC_PIN_SIN);
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TLCPORT |= 1<< TLC_PIN_SIN;
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SCLK();
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}
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}
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//blank outputs of low-side (column) driver
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TLCPORT |= _BV(TLC_PIN_BLANK);
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//rowswitch
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nextrow();
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//latch data, disable blanking
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XLAT();
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TLCPORT &= ~_BV(TLC_PIN_BLANK);
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//delay 4096 gsclocks (256)
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_delay_us(254);
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}
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}
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void borg_hw_init() {
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//init column driver
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@ -261,6 +313,9 @@ void borg_hw_init() {
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// reset shift registers for the rows
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ROWPORT = 0;
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//test tlc chip
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//test_tlc();
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//activate the activator
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timer0_on();
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@ -1,9 +1,6 @@
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mainmenu_option next_comment
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comment "Borg16 HGMod port setup"
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#define COLPORT PORTC
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#define COLDDR DDRC
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choice 'TLC5940 Control Port' \
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"PORTA PORTA \
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PORTB PORTB \
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