From b56710f04b5ae66de476b82149c02ec953834a49 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Lucas=20Ple=C3=9F?= <lucas@xleave.de>
Date: Wed, 12 Jun 2013 00:48:17 +0200
Subject: [PATCH] fixed an error in schematic, TX and RX were not connected

---
 display/pb_mainboard.brd | 22 +++++++++++++---------
 display/pb_mainboard.sch |  3 +++
 2 files changed, 16 insertions(+), 9 deletions(-)

diff --git a/display/pb_mainboard.brd b/display/pb_mainboard.brd
index 16e3a4c..51e2158 100644
--- a/display/pb_mainboard.brd
+++ b/display/pb_mainboard.brd
@@ -8,7 +8,7 @@
 </settings>
 <grid distance="0.025" unitdist="inch" unit="mm" style="lines" multiple="1" display="no" altdistance="0.005" altunitdist="inch" altunit="inch"/>
 <layers>
-<layer number="1" name="Top" color="4" fill="1" visible="no" active="yes"/>
+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>
 <layer number="2" name="Route2" color="1" fill="3" visible="no" active="no"/>
 <layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/>
 <layer number="4" name="Route4" color="1" fill="4" visible="no" active="no"/>
@@ -28,14 +28,14 @@
 <layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>
 <layer number="19" name="Unrouted" color="6" fill="1" visible="no" active="yes"/>
 <layer number="20" name="Dimension" color="15" fill="1" visible="no" active="yes"/>
-<layer number="21" name="tPlace" color="7" fill="1" visible="no" active="yes"/>
-<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="yes"/>
-<layer number="23" name="tOrigins" color="15" fill="1" visible="no" active="yes"/>
-<layer number="24" name="bOrigins" color="15" fill="1" visible="no" active="yes"/>
-<layer number="25" name="tNames" color="7" fill="1" visible="no" active="yes"/>
-<layer number="26" name="bNames" color="7" fill="1" visible="no" active="yes"/>
-<layer number="27" name="tValues" color="7" fill="1" visible="no" active="yes"/>
-<layer number="28" name="bValues" color="7" fill="1" visible="no" active="yes"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/>
+<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/>
+<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="yes"/>
 <layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/>
 <layer number="30" name="bStop" color="7" fill="6" visible="no" active="yes"/>
 <layer number="31" name="tCream" color="7" fill="4" visible="no" active="yes"/>
@@ -1356,9 +1356,13 @@ design rules under a new name.</description>
 </signal>
 <signal name="N$9">
 <contactref element="IC3" pad="11"/>
+<contactref element="IC5" pad="3"/>
+<wire x1="20.32" y1="16.51" x2="33.02" y2="50.165" width="0" layer="19" extent="1-1"/>
 </signal>
 <signal name="N$10">
 <contactref element="IC3" pad="12"/>
+<contactref element="IC5" pad="2"/>
+<wire x1="17.78" y1="16.51" x2="33.02" y2="52.705" width="0" layer="19" extent="1-1"/>
 </signal>
 <signal name="AD_I_GEN">
 <contactref element="R2" pad="2"/>
diff --git a/display/pb_mainboard.sch b/display/pb_mainboard.sch
index ddd0d44..2069402 100644
--- a/display/pb_mainboard.sch
+++ b/display/pb_mainboard.sch
@@ -13507,6 +13507,7 @@ high speed (Philips)</description>
 <plain>
 <text x="165.1" y="30.48" size="2.54" layer="94" ratio="7">Bikegenerator Powerbox Mainboard</text>
 <text x="165.1" y="25.4" size="2.54" layer="94">Lucas Pleß</text>
+<text x="254" y="7.62" size="2.54" layer="94">2</text>
 </plain>
 <instances>
 <instance part="IC5" gate="G$1" x="68.58" y="88.9"/>
@@ -13840,12 +13841,14 @@ high speed (Philips)</description>
 <wire x1="152.4" y1="91.44" x2="152.4" y2="99.06" width="0.1524" layer="91"/>
 <pinref part="IC3" gate="G$1" pin="T1IN"/>
 <wire x1="152.4" y1="99.06" x2="167.64" y2="99.06" width="0.1524" layer="91"/>
+<pinref part="IC5" gate="G$1" pin="PD1(TXD)"/>
 </segment>
 </net>
 <net name="N$10" class="0">
 <segment>
 <pinref part="IC3" gate="G$1" pin="R1OUT"/>
 <wire x1="93.98" y1="93.98" x2="167.64" y2="93.98" width="0.1524" layer="91"/>
+<pinref part="IC5" gate="G$1" pin="PD0(RXD)"/>
 </segment>
 </net>
 <net name="LOADSW" class="0">